Reliable , High - Performance I / O Buffer Design for Multiple Power Supply Systems

In IC designs which incorporate multiple power supply voltages, the interfacing of signals between blocks with different power supplies can be achieved through I/O buffer circuits, which demand high-performance as well as ESD protection for the inputs and outputs. High performance buffers are also desirable for intra-chip interfacing for technologies that require multiple supply voltages. This work presents a set of buffers suitable for use in multiple power supply systems. The intra-chip buffers presented are low-area, high-speed buffers able to convert between the voltage levels of differing power supplies. The inter-chip buffers presented are high-speed buffers which can withstand voltages on bus lines of up to twice the chip power supply, with exceptionally good performance when compared with comparable work in literature. However, the investigation of ESD protection was less successful. A method of designing ESD protection for these multiple voltage systems is described; however, this is a relatively standard method of ESD protection. Overall, however, a significantly faster buffer design is developed for use in multiple power supply systems.